SH7713 datasheet(356/904 Pages) RENESAS

356 / 904 page

Section 11 On-Chip Oscillation Circuits

Rev.1.50 Aug. 30, 2006 Page 316 of 860

REJ09B0288-0150

Pin Values

Clock I/O

Mode

MD2

MD1

MD0

Source

Output

PLL2

On/Off

PLL1

On/Off

CKIO

Frequency

EXTAL

CKIO

CKIO2

(x 2)

(x 1, 2, 3)

(EXTAL) x 2

Crystal

resonator

CKIO

CKIO2

(x 2)

(x 1, 2, 3)

(Crystal) x 2

CKIO



OFF

(x 1, 2, 3)

(CKIO)

Mode 0: An external clock is input from the EXTAL pin and undergoes waveform shaping by PLL

circuit 2 before being supplied inside this LSI. An input clock frequency of 33.3 MHz to

66.67 MHz can be used, and the CKIO frequency range is 33.3 MHz to 66.67 MHz.

Mode 1: An external clock is input from the EXTAL pin and its frequency is multiplied by 4 by PLL

circuit 2 before being supplied inside this LSI, allowing a low-frequency external clock to

be used. An input clock frequency of 10.00 MHz to 16.67 MHz can be used, and the

CKIO frequency range is 40.00 MHz to 66.67 MHz.

Mode 2: The on-chip crystal oscillator operates, with the oscillation frequency being multiplied by 4

by PLL circuit 2 before being supplied inside this LSI, allowing a low-frequency external

clock to be used. A crystal oscillation frequency of 10.00 MHz to 16.67 MHz can be used,

and the CKIO frequency range is 40.00 MHz to 66.67 MHz.

Mode 4: The on-chip crystal oscillator operates and undergoes waveform shaping by PLL circuit 2

before being supplied inside this LSI. A crystal oscillation frequency of 33.34 MHz to

48.00 MHz can be used, and the CKIO frequency range is 33.34 MHz to 48.00 MHz.

Mode 5: An external clock is input from the EXTAL pin and its frequency is multiplied by 2 by PLL

circuit 2 before being supplied inside this LSI, allowing a low-frequency external clock to

be used. An input clock frequency of 16.67 MHz to 33.34 MHz can be used, and the

CKIO frequency range is 33.34 MHz to 66.67 MHz.

Mode 6: The on-chip crystal oscillator operates, with the oscillation frequency being multiplied by 2

by PLL circuit 2 before being supplied inside this LSI, allowing a low-frequency clock to

be used. A crystal oscillation frequency of 10.00 MHz to 16.67 MHz can be used, and the

CKIO frequency range is 40.00 MHz to 66.67 MHz

Mode 7: In this mode, the CKIO pin is an input, an external clock is input to this pin, and

undergoes waveform shaping and also frequency multiplication according to the setting,

by PLL circuit 1 before being supplied to this LSI. As PLL circuit 1 compensates for

fluctuations in the CKIO pin load, this mode is suitable for connection of synchronous

DRAM.

SH7713 Datasheet(PDF) 356 Page - Renesas Technology Corp

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