SH7713 datasheet(355/904 Pages) RENESAS

355 / 904 page

Section 11 On-Chip Oscillation Circuits

Rev.1.50 Aug. 30, 2006 Page 315 of 860

REJ09B0288-0150

11.2.2

Input/Output Pins

Table 11.1 lists the CPG pins and their functions.

Table 11.1

Pin Configuration

Pin Name

Abbreviation I/O

Description

Mode control pins MD0

Set the clock operating mode.

MD1

Set the clock operating mode.

MD2

Set the clock operating mode.

XTAL

Connects a crystal oscillator.

Crystal oscillator

pins (clock input

pins)

EXTAL

Connects a crystal oscillator. Also used to input an

external clock.

Clock I/O pin

CKIO

Inputs or outputs an external clock.

Clock output pin

CKIO2

Outputs an external clock.

Note:

To prevent device malfunction, the value of the mode control pin is sampled only by a

power-on reset.

11.3

Clock Operating Modes

Table 11.2 shows the relationship between the mode control pins (MD2 to MD0) combinations

and the clock modes. Table 11.3 shows the available combinations of the values of the clock

modes and frequency control register (FRQCR).

Table 11.2

Clock Operating Modes

Pin Values

Clock I/O

Mode

MD2

MD1

MD0

Source

Output

PLL2

On/Off

PLL1

On/Off

CKIO

Frequency

EXTAL

CKIO

CKIO2

(x 1)

(x 1, 2, 3)

(EXTAL)

EXTAL

CKIO

CKIO2

(x 4)

(x 1, 2, 3)

(EXTAL) x 4

Crystal

resonator

CKIO

CKIO2

(x 4)

(x 1, 2, 3)

(Crystal) x 4

Crystal

resonator

CKIO

CKIO2

(x 1)

(x 1, 2, 3)

(Crystal)

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