SH7713 datasheet(384/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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384 / 904 page

Section 12 Bus State Controller (BSC)

Rev.1.50 Aug. 30, 2006 Page 344 of 860

REJ09B0288-0150

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This bit is always read as 1. The write value should always

be 1.

ENDIAN

0/1*

Endian Flag

Samples the external pin for specifying endian on power-on

reset (MD5). All address spaces are defined by this bit.

This is a read-only bit.

0: The external pin for specifying endian (MD5) was low

level on power-on reset. This LSI is being operated as

big endian.

1: The external pin for specifying endian (MD5) was high

level on power-on reset. This LSI is being operated as

little endian.

CK2DRV

R/W

CKIO2 Drive

Specifies whether the CKIO2 pin outputs a low level signal

or clock (B

φ).

0: Outputs a low level signal

1: Outputs a clock (B

φ)

HIZMEM

R/W

High-Z Memory Control

Specifies the pin state in standby mode for A25 to A0,

BS,

CSn, RD/WR, WEn (BEn)/DQMxx, and RD. When a bus is

released, these pins enter the high-impedance state

regardless of the setting of this bit.

0: High impedance in standby mode

1: Driven in standby mode

SH7713 Datasheet(PDF) 384 Page - Renesas Technology Corp

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