SH7713 datasheet(387/904 Pages) RENESAS

387 / 904 page

Section 12 Bus State Controller (BSC)

Rev.1.50 Aug. 30, 2006 Page 347 of 860

REJ09B0288-0150

Bit

Bit Name

Initial

Value

R/W

Description

IWRWS2

IWRWS1

IWRWS0

R/W

Idle Cycles for Read-Write in Same Space

Specify the number of idle cycles to be inserted after the

access to a memory that is connected to the space. The

target cycle is a read-write cycle of which continuous

accesses are for the same space.

000: No idle cycle inserted

001: 1 idle cycles inserted

010: 2 idle cycles inserted

011: 4 idle cycles inserted

100: 6 idle cycles inserted

101: 8 idle cycles inserted

110: 10 idle cycles inserted

111: 12 idle cycles inserted

IWRRD2

IWRRD1

IWRRD0

R/W

Idle Cycles for Read-Read in Another Space

Specify the number of idle cycles to be inserted after the

access to a memory that is connected to the space. The

target cycle is a read-read cycle of which continuous

accesses switch between different space.

000: No idle cycle inserted

001: 1 idle cycles inserted

010: 2 idle cycles inserted

011: 4 idle cycles inserted

100: 6 idle cycles inserted

101: 8 idle cycles inserted

110: 10 idle cycles inserted

111: 12 idle cycles inserted

SH7713 Datasheet(PDF) 387 Page - Renesas Technology Corp

SH7713 Datasheet(HTML) 387 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL