SH7713 datasheet(409/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

409 / 904 page

Section 12 Bus State Controller (BSC)

Rev.1.50 Aug. 30, 2006 Page 369 of 860

REJ09B0288-0150

Bit

Bit Name

Initial

Value

R/W

Description

6 to 0



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

• CS3WCR

Bit

Bit Name

Initial

Value

R/W

Description

31 to



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

TRP1

TRP0

R/W

Number of Wait Cycles Waiting Completion of Precharge

Specify the number of minimum wait cycles to be inserted

to wait the completion of precharge. The setting for areas 2

and 3 is common.

(1) From starting auto-charge to issuing the ACTV

command

for the same bank

(2) From issuing the PRE/PALL command to issuing the

ACTV command for the same bank

(3) To transiting to power-down mode/deep power-down

mode

(4) From issuing the PALL command at auto-refresh to

issuing the REF command

(5) From issuing the PALL command at self-refresh to

issuing the SELF command

00: 0 cycle

01: 1 cycles

10: 2 cycles

11: 3 cycles



Reserved

This bit is always read as 0. The write value should always

be 0.

SH7713 Datasheet(PDF) 409 Page - Renesas Technology Corp

SH7713 Datasheet(HTML) 409 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL