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SH7713 Datasheet(PDF) 532 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 532 Page - Renesas Technology Corp

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Section 13 Direct Memory Access Controller (DMAC)
Rev.1.50 Aug. 30, 2006 Page 492 of 860
REJ09B0288-0150
CKIO
Address
RD
Data
WEn
DACKn
TENDn
WAIT
CS
T1
T2
Taw
T1
T2
(Active low)
(Active low)
Note: TEND is asserted for the last transfer unit of DMA transfers.
If a transfer unit is divided into multiple bus cycles and
if CS is negated during the bus cycle, TEND is also divided.
Figure 13.17 Example of BSC Ordinary Memory Access
(No Wait, Idle Cycle = 1, Longword Access to 16-bit Device)



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