SH7713 datasheet(528/904 Pages) RENESAS

528 / 904 page

Section 13 Direct Memory Access Controller (DMAC)

Rev.1.50 Aug. 30, 2006 Page 488 of 860

REJ09B0288-0150

Table 13.8

Relationship of Request Modes and Bus Modes by DMA Transfer Category

Address

Mode

Transfer Category

Request

Mode

Bus

Mode

Transfer

Size (bits)

Usable

Channels

External device with DACK and external

memory

External

B/C

8/16/32/128

0, 1

External device with DACK and memory-

mapped external device

External

B/C

8/16/32/128

0, 1

External memory and external memory

External,

auto

B/C

8/16/32/128

0 to 5*

Dual

External memory and memory-mapped

external device

External,

auto

B/C

8/16/32/128

0 to 5*

Memory-mapped external device and

memory-mapped external device

External,

auto

B/C

8/16/32/128

0 to 5*

External memory and on-chip peripheral

module

All*

8/16/32*

0 to 5*

Memory-mapped external device and

on-chip peripheral module

All*

8/16/32*

0 to 5*

On-chip peripheral module and on-chip

peripheral module

All*

8/16/32*

0 to 5*

X/Y memory and X/Y memory

External,

auto

B/C

8/16/32/128

0 to 5*

X/Y memory and memory-mapped

external device

External,

auto

B/C

8/16/32/128

0 to 5*

X/Y memory and on-chip peripheral

module

All*

8/16/32*

0 to 5*

X/Y memory and external memory

External,

auto

B/C

8/16/32/128

0 to 5*

External device with DACK and external

memory

External

B/C

8/16/32

0, 1

Single

External device with DACK and memory-

mapped external device

External

B/C

8/16/32

0, 1

[Legend] B: Burst, C: Cycle steal

Notes: 1. External requests, auto requests, and on-chip peripheral module requests are all

available. However, the request-source register must be designated as the transfer

source or the transfer destination.

2. If the transfer request is an external request, channels 0 and 1 are only available.

3. Access size permitted for each module must be used when accessing the on-chip

peripheral module.

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