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SH7713 Datasheet(PDF) 629 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 629 Page - Renesas Technology Corp |
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629 / 904 page ![]() Section 17 Serial I/O with FIFO (SIOF) Rev.1.50 Aug. 30, 2006 Page 589 of 860 REJ09B0288-0150 17.2 Input/Output Pins The pin configuration of the SIOF0/1 is shown in table 17.1. Table 17.1 Pin Configuration Channel Name Abbreviation I/O Function Clock input pin SIOMCLK0 Input Master clock input Communication clock pin SCK_SIO0 Input/ output Serial clock (common to transmission/reception) Frame synchronous pin SIOFSYNC0 Input/ output Frame synchronous signal (common to transmission/reception) Transmit data pin TXD_SIO0 Output Transmit data 0 Receive data pin RXD_ SIO0 Input Receive data Clock input pin SIOMCLK1 Input Master clock input Communication clock pin SCK_SIO1 Input/ output Serial clock (common to transmission/reception) Frame synchronous pin SIOFSYNC1 Input/ output Frame synchronous signal (common to transmission/reception) Transmit data pin TXD_SIO1 Output Transmit data 1 Receive data pin RXD_SIO1 Input Receive data |
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