SH7713 datasheet(633/904 Pages) RENESAS

633 / 904 page

Section 17 Serial I/O with FIFO (SIOF)

Rev.1.50 Aug. 30, 2006 Page 593 of 860

REJ09B0288-0150

Bit

Bit Name

Initial

Value

R/W

Description

4 to 0



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

17.3.2

Serial Clock Select Register (SISCR)

SISCR is used to set the baud rate generator operation. SISCR can be specified when the TRMD1

and TRMD0 bits in SIMDR are specified as B

′10 or B′11. SISCR is initialized by a power-on

reset or software reset.

Bit

Bit Name

Initial

Value

R/W

Description

MSSEL

R/W

Master Clock Source Selection

The master clock is the clock input to the baud rate

generator.

0: Uses the SIOMCLK pin input signal as the master clock

1: Uses PCLK as the master clock

MSIMM

R/W

Master Clock Direct Selection

0: Uses the baud rate generator output clock as the clock

source

1: Uses the master clock itself as the clock source

—

Reserved

This bit is always read as 0. The write value should always

be 0.

BRPS4

BRPS3

BRPS2

BRPS1

BRPS0

R/W

Baud Rate Generator’s Prescalar Setting (BRPS)

Set the master clock division ratio BRPS.

00000: (

× 1/32)

00001: (

× 1/1)

00010: (

× 1/2)

11111: (

× 1/31)

7 to 3

—

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

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