SH7713 datasheet(634/904 Pages) RENESAS

634 / 904 page

Section 17 Serial I/O with FIFO (SIOF)

Rev.1.50 Aug. 30, 2006 Page 594 of 860

REJ09B0288-0150

Bit

Bit Name

Initial

Value

R/W

Description

BRDV2

BRDV1

BRDV0

R/W

Baud Rate Generator’s Division Ratio Setting (BRDV)

Set the frequency division ratio BRDV for the output stage

of the baud rate generator. The final frequency division ratio

of the baud rate generator is determined by BRPS

× BRDV

(maximum 1/1024).

000: Prescalar output

× 1/2

001: Prescalar output

× 1/4

010: Prescalar output

× 1/8

011: Prescalar output

× 1/16

100: Prescalar output

× 1/32

Note:

Other than above is reserved (setting prohibited).

17.3.3

Serial Transmit Data Assign Register (SITDAR)

SITDAR is used to specify the position of the transmit data in a frame (slot number). SITDAR is

initialized by a power-on reset and software reset.

Bit

Bit Name

Initial

Value

R/W

Description

TDLE

R/W

Transmit Left Channel Data Enable

0: Disables left channel data transmission

1: Enables left channel data transmission

14 to 12



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

TDLA3

TDLA2

TDLA1

TDLA0

R/W

Transmit Left Channel Data Assigns

Specify the position of left-channel data in transmit frame

as B

′0000 to B′1110. Transmit data for the left channel is

specified in bits SITDL15 to SITDL0 in SITDR.

Note: If the TDLA3 to TDLA0 bits are set to B

′1111,

operation is not guaranteed.

TDRE

R/W

Transmit Right Channel Data Enable

0: Disables right channel data transmission

1: Enables right channel data transmission

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