SH7713 datasheet(709/904 Pages) RENESAS

709 / 904 page

Section 19 Ethernet Controller Direct Memory Access Controller (E-DMAC)

EDMAS20B_000020020900

Rev.1.50 Aug. 30, 2006 Page 669 of 860

REJ09B0288-0150

Section 19 Ethernet Controller Direct Memory Access

Controller (E-DMAC)

This LSI has an on-chip one-channel direct memory access controller (E-DMAC) directly

connected to the Ethernet controller (EtherC). By using the DMAC contained in the E-DMAC, the

E-DMAC transfers transmit/receive data between the transmit/receive FIFO in the E-DMAC and a

user-specified data storage destination (buffer) by DMA transfer. At DMA transfer, information

referenced by the E-DMAC is referred to as a transmit/receive descriptor, and the user places this

descriptor in memory.

This function reduces the load on the CPU and enables efficient data transfer control to be

achieved. The E-DMAC controls the data transmission/reception from the MAC of EtherC.

Figure 19.1 shows the configuration of the E-DMAC, and the descriptors and transmit/receive

buffers in memory.

19.1

Features

The E-DMAC has the following features:

• Contains one-channel independent transmit/receive DMAC

• The load on the CPU is reduced by means of a descriptor management system

• Transmit/receive frame status information is indicated in descriptors

• Achieves efficient system bus utilization through the use of DMA block transfer (16-byte

units)

• Supports single-frame/single-descriptor operation and single-frame/multi-frame (multi-buffer)

operation

Note:

The E-DMAC cannot access peripheral modules.

SH7713 Datasheet(PDF) 709 Page - Renesas Technology Corp