SH7713 datasheet(204/904 Pages) RENESAS

204 / 904 page

Section 4 Exception Handling

Rev.1.50 Aug. 30, 2006 Page 164 of 860

REJ09B0288-0150

Exception Type

Current

Instruction

Exception Event

Priority*

Exception

Order

Process

at BL=1

Vector

Code

Vector Offset

User breakpoint

(Data break, I-BUS

break)

Ignored

H'1E0

H'00000100

General exception

events

(asynchronous)

Completed

DMA address error

Retained

H'5C0

H'00000100

General interrupt

requests

(asynchronous)

Completed

Interrupt requests

—*

Retained

—*

H'00000600

Notes: 1. Priorities are indicated from high to low, 1 being the highest and 3 the lowest.

A reset has the highest priority. An interrupt is accepted only when general exceptions

are not requested.

2. For details on priorities in multiple interrupt sources, refer to section 8, Interrupt

Controller (INTC).

3. If an interrupt is accepted, the interrupt source register (EXPEVT) is not changed. The

interrupt source code is specified in interrupt source register 2 (EXPEVT2). For details,

refer to section 8, Interrupt Controller (INTC).

4. If one of these exceptions occurs in a specific part of the repeat loop, a specific code

and vector offset are specified.

5. These exception codes are valid when the MMU is used.

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