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SH7713 Datasheet(PDF) 202 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 202 Page - Renesas Technology Corp |
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202 / 904 page ![]() Section 4 Exception Handling Rev.1.50 Aug. 30, 2006 Page 162 of 860 REJ09B0288-0150 Acceptance Priority and Test Priority: Acceptance priorities are determined for all exception requests. The priority of resets, general exceptions, and interrupts are determined in this order: a reset is always accepted regardless of the CPU status. Interrupts are accepted only when resets or general exceptions are not requested. If multiple general exceptions occur simultaneously in the same instruction, the priority is determined as follows. 1. A processing-completion type exception generated at the previous instruction* 2. A user break before instruction execution (re-execution type) 3. An exception related to an instruction fetch (CPU address error and MMU related exceptions: re-execution type) 4. An exception caused by an instruction decode (General illegal instruction exceptions and slot illegal instruction exceptions: re-execution type, unconditional trap: processing-completion type) 5. An exception related to data access (CPU address error and MMU related exceptions: re- execution type) 6. Unconditional trap (processing-completion type) 7. A user break other than one before instruction execution (processing-completion type) 8. DMA address error (processing-completion type) Note: * If a processing-completion type exception is accepted at an instruction, exception processing starts before the next instruction is executed. This exception processing executed before an exception generated at the next instruction is detected. Only one exception is accepted at a time. Accepting multiple exceptions sequentially results in all exception requests being processed. |
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