SH7713 datasheet(317/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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317 / 904 page

Section 9 User Break Controller

Rev.1.50 Aug. 30, 2006 Page 277 of 860

REJ09B0288-0150

Bit

Bit Name

Initial

Value

R/W

Description

SEQ

R/W

Sequence Condition Select

Selects two conditions of channels A and B as

independent or sequential conditions.

0: Channels A and B are compared under independent

conditions

1: Channels A and B are compared under sequential

conditions (channel A, then channel B)



Reserved

These bits are always read as 0. The write value should

always be 0.

ETBE

R/W

Number of Execution Times Break Enable

Enables the execution-times break condition only on

channel B. If this bit is 1 (break enable), a user break is

issued when the number of break conditions matches

with the number of execution times that is specified by

BETR.

0: The execution-times break condition is disabled on

channel B

1: The execution-times break condition is enabled on

channel B

SH7713 Datasheet(PDF) 317 Page - Renesas Technology Corp