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SH7713 Datasheet(PDF) 313 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 313 Page - Renesas Technology Corp

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Section 9 User Break Controller
Rev.1.50 Aug. 30, 2006 Page 273 of 860
REJ09B0288-0150
Bit
Bit Name
Initial
Value
R/W
Description
5
4
IDB1
IDB0
0
0
R/W
R/W
Instruction Fetch/Data Access Select B
Select the instruction fetch cycle or data access cycle
as the bus cycle of the channel B break condition.
00: Condition comparison is not performed
01: The break condition is the instruction fetch cycle
10: The break condition is the data access cycle
11: The break condition is the instruction fetch cycle or
data access cycle
3
2
RWB1
RWB0
0
0
R/W
R/W
Read/Write Select B
Select the read cycle or write cycle as the bus cycle of
the channel B break condition.
00: Condition comparison is not performed
01: The break condition is the read cycle
10: The break condition is the write cycle
11: The break condition is the read cycle or write cycle
1
0
SZB1
SZB0
0
0
R/W
R/W
Operand Size Select B
Select the operand size of the bus cycle for the channel
B break condition.
00: The break condition does not include operand size
01: The break condition is byte access
10: The break condition is word access
11: The break condition is longword access



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