SH7721 datasheet(388/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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388 / 1524 page

Section 9

Bus State Controller (BSC)

Rev. 3.00 Jan. 18, 2008 Page 326 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This bit is always read as 0. The write value should always

be 0.

RFSH

R/W

Refresh Control

Specifies whether or not the refresh operation of the SDRAM

is performed.

0: No refresh

1: Refresh

RMODE

R/W

Refresh Control

Specifies whether to perform auto-refresh or self-refresh

when the RFSH bit is 1. When the RFSH bit is 1 and this bit

is 1, self-refresh starts immediately. When the RFSH bit is 1

and this bit is 0, auto-refresh starts according to the contents

that are set in RTCSR, RTCNT, and RTCOR.

0: Auto-refresh is performed

1: Self-refresh is performed

PDOWN

Power-Down Mode

Specifies whether the SDRAM is entered in power-down

mode or not after the access to SDRAM is completed. If this

bit is set to 1, the CKE pin is pulled to low to place the

SDRAM to power-down mode.

0: Does not place the SDRAM in power-down mode after

access completion.

1: Places the SDRAM in power-down mode after access

completion.

SH7721 Datasheet(PDF) 388 Page - Renesas Technology Corp

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