SH7721 datasheet(541/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 13

Power-Down Modes

Rev. 3.00

Jan. 18, 2008

Page 479 of 1458

REJ09B0033-0300

(1)

Power-On Reset

1. Driving the

RESETP pin low.

2. While the WT/IT bit in WTCSR is set to 1 and the RSTS bit is cleared to 0, the WDT starts

counting and continues until it overflows.

3. Generation of the H-UDI reset (for details on the H-UDI reset, refer to section 36, User

Debugging Interface (H-UDI)).

(2)

Manual Reset

1. Driving the

RESETM pin low.

2. While the WT/IT bit in WTCSR and the RSTS bit are set to 1, the WDT starts counting and

continues until it overflows.

13.2

Input/Output Pins

Table 13.2 lists the pin configuration related to power-down modes.

Table 13.2

Pin Configuration

Pin Name

Abbreviation

I/O

Description

Status 1 output

STATUS1

Status 0 output

STATUS0

Output

Operating state of the processor.

HH: Reset

HL: Sleep mode

LH: Standby mode

LL: Normal operation

Power-on reset

input

RESETP

Input

Power-on reset occurs at low-level.

Manual-reset input

RESETM

Input

Manual reset occurs at low-level.

Chip active

Input

Hardware standby mode entered at low-level.

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