SH7721 datasheet(543/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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Manufacturer	RENESAS [Renesas Technology Corp]

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543 / 1524 page

Section 13

Power-Down Modes

Rev. 3.00

Jan. 18, 2008

Page 481 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This bit is always read as 0. The write value should

always be 0.

MSTP2

R/W

Module Stop Bit 2

When the MSTP2 bit is set to 1, the supply of the clock to

the TMU is halted.

0: TMU operates

1: Clock supply to TMU halted

MSTP1

R/W

Module Stop Bit 1

When the MSTP1 bit is set to 1, the supply of the clock to

the RTC is halted.

0: RTC operates

1: Clock supply to RTC halted



Reserved

This bit is always read as 0. The write value should

always be 0.

13.3.2

Standby Control Register 2 (STBCR2)

STBCR2 is an 8-bit readable/writable register that controls the operation of modules in power-

down mode.

Bit

Bit Name

Initial

Value

R/W

Description

MSTP10

R/W

Module Stop Bit 10

When the MSTP10 bit is set to 1, the supply of the clock

to the H-UDI is halted.

0: H-UDI operates

1: Clock supply to H-UDI halted

MSTP9

R/W

Module Stop Bit 9

When the MSTP9 bit is set to 1, the supply of the clock to

the UBC is halted.

0: UBC operates

1: Clock supply to UBC halted

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