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SH7721 Datasheet(PDF) 547 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 547 Page - Renesas Technology Corp |
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547 / 1524 page ![]() Section 13 Power-Down Modes Rev. 3.00 Jan. 18, 2008 Page 485 of 1458 REJ09B0033-0300 Bit Bit Name Initial Value R/W Description 3 MSTP43 0 R/W Module Stop Bit 43 When the MSTP43 bit is set to 1, the supply of the clock to the MMC is halted. 0: MMC operates 1: Clock supply to MMC halted 2 MSTP42 0 R/W Module Stop Bit 42 When the MSTP42 bit is set to 1, the supply of the clock to the SIM is halted. 0: SIM operates 1: Clock supply to SIM halted 1 MSTP41 0 R/W Module Stop Bit 41 When the MSTP41 bit is set to 1, the supply of the clock to the SCIF1 is halted. 0: SCIF1 operates 1: Clock supply to SCIF1 halted 0 MSTP40 0 R/W Module Stop Bit 40 When the MSTP40 bit is set to 1, the supply of the clock to the SCIF0 is halted. 0: SCIF0 operates 1: Clock supply to SCIF0 halted |
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