SH7721 datasheet(548/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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548 / 1524 page

Section 13

Power-Down Modes

Rev. 3.00

Jan. 18, 2008

Page 486 of 1458

REJ09B0033-0300

13.3.5

Standby Control Register 5 (STBCR5)

STBCR5 is an 8-bit readable/writable register that controls the operation of modules in power-

down mode.

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This bit is always read as 0. The write value should

always be 0.

MSTP56

R/W

Module Stop Bit 56

When the MSTP56 bit is set to 1, the supply of the clock

to the SDHI is halted.

0: Clock supply to SDHI halted

1: SDHI operates

Note: On the models not having the SDHI, this bit is

reserved and is always read as 0. The write value

should always be 0.



Reserved

This bit is always read as 0. The write value should

always be 0.

MSTP54

R/W

Module Stop Bit 54

When the MSTP54 bit is set to 1, the supply of the clock

to the TPU is halted.

0: TPU operates

1: Clock supply to TPU halted



Reserved

This bit is always read as 0. The write value should

always be 0.

SH7721 Datasheet(PDF) 548 Page - Renesas Technology Corp

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