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SH7721 Datasheet(PDF) 552 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 552 Page - Renesas Technology Corp |
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552 / 1524 page ![]() Section 13 Power-Down Modes Rev. 3.00 Jan. 18, 2008 Page 490 of 1458 REJ09B0033-0300 Immediately after an interrupt is detected, the phase of the clock output of the CKIO pin may be unstable, until software standby mode is canceled. Notes: 1. Only when the RTC is used, software standby mode can be canceled by IRQ (edge detection), RTC, TMU, or PINT interrupt. 2. Cancel this software standby mode by a power-on reset. WTCNT value H'FF H'80 Time Interrupt request WDT overflow and branch to interrupt handling routine Crystal oscillator settling time and PLL synchronization time Clear the STBY bit in STBCR before WTCNT reaches H'80. When he STBY bit in STBCR is cleared, WTCNT halts automatically. Figure 13.1 Canceling Standby Mode with STBY Bit in STBCR (2) Canceling with Reset Software standby mode is canceled by a reset with the RESETP pin and RESETM pin. Keep the RESETP pin and RESETM pin low until the clock oscillation settles in clock operating mode to use PLL. The internal clock will continue to be output to the CKIO pin. |
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