| Electronic Components Datasheet Search |
|
SH7721 Datasheet(PDF) 546 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7721 Datasheet(HTML) 546 Page - Renesas Technology Corp |
|
546 / 1524 page ![]() Section 13 Power-Down Modes Rev. 3.00 Jan. 18, 2008 Page 484 of 1458 REJ09B0033-0300 Bit Bit Name Initial Value R/W Description 1 MSTP31 0 R/W Module Stop Bit 31 When the MSTP31 bit is set to 1, the supply of the clock to the USBH is halted. 0: USBH operates 1: Clock supply to USBH halted 0 MSTP30 0 R/W Module Stop Bit 30 When the MSTP30 bit is set to 1, the supply of the clock to the USBF is halted. 0: USBF operates 1: Clock supply to USBF halted 13.3.4 Standby Control Register 4 (STBCR4) STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power- down mode. Bit Bit Name Initial Value R/W Description 7, 6 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 5 MSTP45 0 R/W Module Stop Bit 45 When the MSTP45 bit is set to 1, the supply of the clock to the PCC is halted. 0: PCC operates 1: Clock supply to PCC halted 4 MSTP44 0 R/W Module Stop Bit 44 When the MSTP44 bit is set to 1, the supply of the clock to the I 2C is halted. 0: I 2C operates 1: Clock supply to I 2C halted |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |