SH7721 datasheet(557/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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557 / 1524 page

Section 13

Power-Down Modes

Rev. 3.00

Jan. 18, 2008

Page 495 of 1458

REJ09B0033-0300

(2)

Canceling sleep mode by a power-on reset

CKIO

RESETP

STATUS

1. If PLL1 multiplication rate changed by a power-on reset,

RESETP must be kept low for the oscillation stabilization time.

2. reset : HH (STATUS1 = High, STATUS0 = High)

3. sleep : HL (STSTUS1= High, STATUS0= Low)

4. normal : LL (STATUS1 = Low, STATUS0 = Low)

5. Bcyc : Bus clock cycle

Notes:

Undefined

0 to 30 Bcyc *5

0 to 10 Bcyc

normal

sleep

reset

normal

Reset

Figure 13.8

STATUS Output When Sleep Mode is Canceled by a Power-on Reset

(3)

Canceling sleep mode by a manual reset

CKIO

STATUS

RESETM must be kept low until STATAU = reset.

2. reset:HH (STATUS1 = High, STATUS0 = High)

3. sleep:HL(STSTUS1= High, STATUS0= Low)

4. normal:LL (STATUS1 = Low, STATUS0 = Low)

5. Bcyc:Bus clock cycle

Notes:

0 to 30 Bcyc *5

0 to 80 Bcyc

normal

sleep

reset

normal

Reset

RESETM

Figure 13.9

STATUS Output When Sleep Mode is Canceled by a Manual Reset

SH7721 Datasheet(PDF) 557 Page - Renesas Technology Corp

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