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SH7721 Datasheet(PDF) 710 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 710 Page - Renesas Technology Corp |
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710 / 1524 page  Section 20 I 2C Bus Interface (IIC) Rev. 3.00 Jan. 18, 2008 Page 648 of 1458 REJ09B0033-0300 20.2 Input/Output Pins Table 20.1 summarizes the input/output pins used by the I 2C bus interface. Table 20.1 I 2C Bus Interface Pins Name Pin Name Abbreviation I/O Function IIC clock IIC_SCL SCL I/O IIC serial clock input/output IIC data I/O IIC_SDA SDA I/O IIC serial data input/output 20.3 Register Descriptions The I 2C bus interface has the following registers: • I2C bus control register 1 (ICCR1) • I2C bus control register 2 (ICCR2) • I2C bus mode register (ICMR) • I2C bus interrupt enable register (ICIER) • I2C bus status register (ICSR) • Slave address register (SAR) • I2C bus transmit data register (ICDRT) • I2C bus receive data register (ICDRR) • I2C bus shift register (ICDRS) • I2C bus master transfer clock select register (ICCKS) |
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