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SH7721 Datasheet(PDF) 714 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 714 Page - Renesas Technology Corp |
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714 / 1524 page ![]() Section 20 I 2C Bus Interface (IIC) Rev. 3.00 Jan. 18, 2008 Page 652 of 1458 REJ09B0033-0300 Bit Bit Name Initial Value R/W Description 5, 4 All 1 Reserved These bits are always read as 1. 3 BCWP 1 R/W BC Write Protect This bit controls the BC2 to BC0 modifications. When modifying BC2 to BC0, this bit should be cleared to 0 and use the MOV instruction. 0: When writing, values of BC2 to BC0 are set. 1: When reading, 1 is always read. When writing, settings of BC2 to BC0 are invalid. 2 1 0 BC2 BC1 BC0 0 0 0 R/W R/W R/W Bit Counter 2 to 0 These bits specify the number of bits to be transferred next. When read, the remaining number of transfer bits is indicated. With the I 2C bus format, the data is transferred with one addition acknowledge bit. Bit BC2 to BC0 settings should be made during an interval between transfer frames. If bits BC2 to BC0 are set to a value other than 000, the setting should be made while the SCL pin is low. The value returns to 000 at the end of a data transfer, including the acknowledge bit. I 2C Bus Format 000: 9 bits 001: 2 bits 010: 3 bits 011: 4 bits 100: 5 bits 101: 6 bits 110: 7 bits 111: 8 bits |
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