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SH7721 Datasheet(PDF) 708 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 708 Page - Renesas Technology Corp |
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708 / 1524 page  Section 20 I 2C Bus Interface (IIC) Rev. 3.00 Jan. 18, 2008 Page 646 of 1458 REJ09B0033-0300 SCL ICCR1 Transfer clock generation circuit Address comparator Interrupt generator Interrupt request Bus state decision circuit Arbitration decision circuit Noise canceller Noise canceller Output control Output control Transmission/ reception control circuit ICCR2 ICMR ICSR ICEIR ICDRR ICDRS ICDRT I 2C bus control register 1 I 2C bus control register 2 I 2C bus mode register I 2C bus status register I 2C bus interrupt enable register I 2C bus transmit data register I 2C bus receive data register I 2C bus shift register Slave address register [Legend ] ICCR1: ICCR2: ICMR: ICSR: ICIER: ICDRT: ICDRR: ICDRS: SAR: ICCKS: I2C bus master transfer clock select register SAR SDA ICCKS Figure 20.1 Block Diagram of I 2C Bus Interface |
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