SH7721 datasheet(741/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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741 / 1524 page

Section 21

Serial I/O with FIFO (SIOF)

SCIS3F2C_000020030200

Rev. 3.00 Jan. 18, 2008 Page 679 of 1458

REJ09B0033-0300

Section 21

Serial I/O with FIFO (SIOF)

This LSI includes a clock-synchronized serial I/O module with FIFO (SIOF) that comprises two

channels. The functions of SIOF_0 and SIOF_1 are the same.

21.1

Features

• Serial transfer

 16-stage 32-bit FIFOs (independent transmission and reception)

 Supports 8-bit data/16-bit data/16-bit stereo audio input and output

 MSB first for data transmission

 Supports a maximum of 48-kHz sampling rate

 Synchronization by either frame synchronization pulse or left/right channel switch

 Supports CODEC control data interface

 Connectable to linear, audio, or A-Law or µ-Law CODEC chip

 Supports both master and slave modes

• Serial clock

 An external pin input or internal clock (Pφ) can be selected as the clock source.

• Interrupts: One type

• DMA transfer

 Supports DMA transmission and reception by a transfer request for transmission and

reception

SH7721 Datasheet(PDF) 741 Page - Renesas Technology Corp