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SH7721 Datasheet(PDF) 898 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 898 Page - Renesas Technology Corp

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Section 25
USB Function Controller (USBF)
Rev. 3.00 Jan. 18, 2008 Page 836 of 1458
REJ09B0033-0300
25.3.39
Timer Register (TMRH/TMRL)
TMRHWMRL is a 16-bit timer which is operated with a peripheral clock
φ. Measuring the SOF
packet reception interval enables the SOF packet break to be detected.
The timer is operated, stopped, and cleared according to the settings of the control register 1
(CTLR1).
Bit
Bit Name
Initial Value
R/W
Description
15 to 0 D15 to D0
0
R/W
Count Value
Note:
The timer register is used as a 16-bit register which consists of upper byte TMRH and lower
TMRL in USBF. TMRH can be read directly, but TMRL is read via an 8-bit temporary
register. Therefore, the registers should be read in the order, TMRH and TMRL, in byte
units. TMRL cannot be read singly.
25.3.40
Set Time Out Register (STOH/STOL)
STOH/STOL specifies the time out value of the timer register. When the count value of the timer
register reaches the specified time out value, the time out interrupt flag in the interrupt flag register
4 is set.
Bit
Bit Name
Initial Value
R/W
Description
15 to 0 D15 to D0
0
R/W
Specified Time Out Value
Note:
The timer register is used as a 16-bit register which consists of upper byte STOH and lower
STOL in USBF. STOH can be read directly, but STOL is read via an 8-bit temporary
register. Therefore, the registers should be read in the order, STOH and STOL, in byte
units. TMRL cannot be read singly.



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