SH7721 datasheet(928/1524 Pages) RENESAS

928 / 1524 page

Section 26

LCD Controller (LCDC)

Rev. 3.00 Jan. 18, 2008 Page 866 of 1458

REJ09B0033-0300

26.3

The LCDC includes the following registers. Refer to section 37, List of Registers, for more details

on the addresses and states of these registers in each operating mode.

• LCDC input clock register (LDICKR)

• LCDC module type register (LDMTR)

• LCDC data format register (LDDFR)

• LCDC scan mode register (LDSMR)

• LCDC data fetch start address register for upper display panel (LDSARU)

• LCDC data fetch start address register for lower display panel (LDSARL)

• LCDC fetch data line address offset register for display panel (LDLAOR)

• LCDC palette control register (LDPALCR)

• LCDC palette data register 00 to FF (LDPR00 to LDPRFF)

• LCDC horizontal character number register (LDHCNR)

• LCDC horizontal synchronization signal register (LDHSYNR)

• LCDC vertical displayed line number register (LDVDLNR)

• LCDC vertical total line number register (LDVTLNR)

• LCDC vertical synchronization signal register (LDVSYNR)

• LCDC AC modulation signal toggle line number register (LDACLNR)

• LCDC interrupt control register (LDINTR)

• LCDC power management mode register (LDPMMR)

• LCDC power supply sequence period register (LDPSPR)

• LCDC control register (LDCNTR)

• LCDC user specified interrupt control register (LDUINTR)

• LCDC user specified interrupt line number register (LDUINTLNR)

• LCDC memory access interval number register (LDLIRNR)

SH7721 Datasheet(PDF) 928 Page - Renesas Technology Corp