SH7721 datasheet(994/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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994 / 1524 page

Section 27

A/D Converter

Rev. 3.00

Jan. 18, 2008

Page 932 of 1458

REJ09B0033-0300

27.3

The A/D converter has the following registers.

• A/D data register A (ADDRA)

• A/D data register B (ADDRB)

• A/D data register C (ADDRC)

• A/D data register D (ADDRC)

• A/D control/status register (ADCSR)

27.3.1

A/D Data Registers A to D (ADDRA to ADDRD)

The four A/D data registers (ADDRA to ADDRD) are 16-bit read-only registers that store the

results of A/D conversion.

An A/D conversion produces 10-bit data, which is transferred for storage into the A/D data

byte (bits 15 to 6) of the A/D data register. Bits 5 to 0 of an A/D data register are always read as 0.

Table 27.2 indicates the pairings of analog input channels and A/D data registers.

Each ADDR is initialized to H'0000 by a reset and the module standby function and in standby

mode.

Table 27.2

Analog Input Channels and A/D Data Registers

Analog Input Channel

A/D Data Register

AN0

ADDRA

AN1

ADDRB

AN2

ADDRC

AN3

ADDRD

SH7721 Datasheet(PDF) 994 Page - Renesas Technology Corp