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SH7721 Datasheet(PDF) 1015 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 1015 Page - Renesas Technology Corp |
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1015 / 1524 page  Section 28 D/A Converter (DAC) Rev. 3.00 Jan. 18, 2008 Page 953 of 1458 REJ09B0033-0300 Section 28 D/A Converter (DAC) This LSI incorporates a two-channel D/A converter (DAC) with the following features. 28.1 Features • 8-bit resolution • Two output channels • Conversion time: Max. 10 µs (when load capacitance is 20 pF) • Output voltage: 0 V to AVcc (analog power supply) Figure 28.1 shows the block diagram for the DAC. [Legend] DACR: DADR0: DADR1: AVcc: AVss: DAO0: DAO1: D/A control register D/A data register 0 D/A data register 1 Analog power supply Analog ground Analog output 0 Analog output 1 Analog I/O buffer DADR0 AVcc AVss DA0 DA1 DAO1 DAO0 DADR1 DACR 8-bit D/A converter D/A converter circuit Internal peripheral clock (P φ) Control circuit Peripheral data bus Figure 28.1 Block Diagram of D/A Converter |
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