SH7721 datasheet(1063/1524 Pages) RENESAS

1063 / 1524 page

Section 30

SIM Card Module (SIM)

Rev. 3.00 Jan. 18, 2008 Page 1001 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This bit is always read as 0. The write value should always

be 0.

30.3.7

Receive Shift Register (SCRSR)

SCRSR is a register that receives serial data.

The smart card interface receives serial data input from the SIM_RXD pin in order, from the LSB

or MSB, and sets it in SCRSR, converting it to parallel data. When reception of one byte of data is

completed, the data is automatically transferred to SCRDR. The CPU or DMAC cannot directly

read from or write to SCRSR.

30.3.8

Receive Data Register (SCRDR)

SCRDR is an 8-bit read-only register that stores received serial data.

When reception of one byte of serial data is completed, the smart card interface transfers the

received serial data from the receive shift register (SCRSR) to SCRDR for storage, and completes

the receive operation. Thereafter, SCRSR can receive data. In this way, SCRSR and SCRDR

constitute a double buffer, enabling continuous reception of data. SCRDR cannot be written to by

the CPU or DMAC.

Bit

Bit Name

Initial

Value

R/W

Description

7 to 0

SCRD7 to

SCRD0

All 0

Receive Data

Store received serial data.

SH7721 Datasheet(PDF) 1063 Page - Renesas Technology Corp