SH7721 datasheet(123/1524 Pages) RENESAS

123 / 1524 page

Section 2

CPU

Rev. 3.00 Jan. 18, 2008 Page 61 of 1458

REJ09B0033-0300

Instruction Format

Source Operand

Destination

Operand

Sample Instruction

nm type

xxxx nnnn mmmm xxxx

mmmm: register

direct

nnnn: register

direct

ADD

Rm,Rn

mmmm: register

indirect

nnnn: register

indirect

MOV.L Rm,@Rn

mmmm: post-

increment register

indirect (multiply-

and-accumulate

operation)

nnnn: * post-

increment register

indirect (multiply-

and-accumulate

operation)

MACH, MACL

MAC.W @Rm+,@Rn+

mmmm: post-

increment register

indirect

nnnn: register

direct

MOV.L @Rm+,Rn

mmmm: register

direct

nnnn: pre-

decrement register

indirect

MOV.L Rm,@-Rn

mmmm: register

direct

nnnn: indexed

MOV.L Rm,@(R0,Rn)

md type

xxxx xxxx mmmm dddd

mmmmdddd:

with displacement

R0 (register direct) MOV.B @(disp,Rm),R0

nd4 type

xxxx xxxx nnnn dddd

R0 (register direct) nnnndddd:

with displacement

MOV.B R0,@(disp,Rn)

nmd type

xxxx nnnn mmmm dddd

mmmm: register

direct

nnnndddd:

with displacement

MOV.L Rm,@(disp,Rn)

mmmmdddd:

with displacement

nnnn: register

direct

MOV.L @(disp,Rm),Rn

SH7721 Datasheet(PDF) 123 Page - Renesas Technology Corp

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