SH7721 datasheet(126/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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126 / 1524 page

Section 2

CPU

Rev. 3.00 Jan. 18, 2008 Page 64 of 1458

REJ09B0033-0300

Type

Kinds of

Instruction

Op Code

Function

Number of

Instructions

MULS

Signed multiplication (16

× 16 bits)

MULU

Unsigned multiplication (16

× 16 bits)

NEG

Sign inversion

NEGC

Sign inversion with borrow

SUB

Binary subtraction

SUBC

Binary subtraction with borrow

Arithmetic

operation

instructions

SUBV

Binary subtraction with underflow

AND

Logical AND

NOT

Bit inversion

Logical OR

TAS

Memory test and bit setting

TST

Logical AND and T bit setting

Logic

operation

instructions

XOR

Exclusive logical OR

ROTCL

1-bit left shift with T bit

ROTCR

1-bit right shift with T bit

ROTL

1-bit left shift

ROTR

1-bit right shift

SHAD

Arithmetic dynamic shift

Shift

instructions

SHAL

Arithmetic 1-bit left shift

SHAR

Arithmetic 1-bit right shift

SHLD

Logical dynamic shift

SHLL

Logical 1-bit left shift

SHLLn

Logical n-bit left shift

SHLR

Logical 1-bit right shift

SHLRn

Logical n-bit right shift

SH7721 Datasheet(PDF) 126 Page - Renesas Technology Corp

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