SH7721 datasheet(124/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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124 / 1524 page

Section 2

CPU

Rev. 3.00 Jan. 18, 2008 Page 62 of 1458

REJ09B0033-0300

Instruction Format

Source Operand

Destination

Operand

Sample Instruction

d type

xxxx xxxx dddd dddd

dddddddd: GBR

indirect with

displacement

R0 (register direct) MOV.L @(disp,GBR),R0

R0 (register direct) dddddddd: GBR

indirect with

displacement

MOV.L R0,@(disp,GBR)

dddddddd:

PC-relative with

displacement

R0 (register direct) MOVA @(disp,PC),R0

dddddddd:

PC-relative



label

d12 type

xxxx dddd dddd dddd

dddddddddddd:

PC-relative



BRA

label

(label=disp+PC)

nd8 type

xxxx nnnn dddd dddd

dddddddd: PC-

relative with

displacement

nnnn: register

direct

MOV.L @(disp,PC),Rn

i type

xxxx xxxx

i i i i

iiiiiiii: immediate

Indexed GBR

indirect

AND.B #imm,@(R0,GBR)

iiiiiiii: immediate

R0 (register direct) AND

#imm,R0

iiiiiiii: immediate



TRAPA #imm

ni type

xxxx nnnn i i i i

i i i i

iiiiiiii: immediate

nnnn: register

direct

ADD

#imm,Rn

Note:

In multiply-and-accumulate instructions, nnnn is the source register.

SH7721 Datasheet(PDF) 124 Page - Renesas Technology Corp

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