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SH7721 Datasheet(PDF) 125 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 125 Page - Renesas Technology Corp |
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125 / 1524 page ![]() Section 2 CPU Rev. 3.00 Jan. 18, 2008 Page 63 of 1458 REJ09B0033-0300 2.6 Instruction Set 2.6.1 Instruction Set Based on Functions Table 2.5 shows the instructions classified by function. Table 2.5 CPU Instruction Types Type Kinds of Instruction Op Code Function Number of Instructions MOV Data transfer 39 MOVA Effective address transfer MOVT T bit transfer SWAP Upper/lower swap Data transfer instructions 5 XTRCT Extraction of middle of linked registers 21 ADD Binary addition 33 ADDC Binary addition with carry ADDV Binary addition with overflow check CMP/cond Comparison DIV1 Division DIV0S Signed division initialization DIV0U Unsigned division initialization DMULS Signed double-precision multiplication DMULU Unsigned double-precision multiplication DT Decrement and test EXTS Sign extension EXTU Zero extension MAC Multiply-and-accumulate, double- precision multiply-and-accumulate Arithmetic operation instructions MUL Double-precision multiplication (32 × 32 bits) |
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