SH7721 datasheet(160/1524 Pages) RENESAS

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Section 3 DSP Operating Unit

Rev. 3.00 Jan. 18, 2008 Page 98 of 1458

REJ09B0033-0300

Notes: 1. If a TRAPA instruction is used as a repeat detection instruction, an instruction

following the repeat detection instruction is regarded as a return address. In this case, a

control cannot be returned to the repeat control correctly. In a TRAPA instruction, an

address of an instruction following the repeat detection address is regarded as return

address. Accordingly, to return to the repeat control correctly, place a return address

prior to the repeat detection instruction.

2. If a SLEEP instruction is placed following a repeat detection instruction, a transition to

the low-power consumption state or an exception acceptance such as interrupts can be

performed correctly. In this case, however, the repeat control cannot be returned

correctly. To return to the repeat control correctly, the SLEEP instruction must be

placed prior to the repeat detection instruction.

(e)

Branch from a repeat detection instruction

If a repeat detection instruction is a delayed slot instruction of a delayed branch instruction or a

branch instruction, a repeat loop can be acknowledged when a branch does not occur in a

branch instruction. If a branch occurs in a branch instruction, a repeat control is not performed

and a branch destination instruction is executed.

(f)

Program counter during repeat control

If RC[11:0]

≥ 2, the program counter (PC) value is not correct for instructions two instructions

following a repeat detection instruction. In a repeat loop consisting of one to three instructions,

the PC indicates the correct value (instruction address + 4) for an instruction (repeat start

instruction) following a repeat detect ion instruction but the PC continues to indicate the same

address (repeat start instruction address) from the subsequent instruction to a repeat end

instruction. In a repeat loop consisting of four or more instructions, the PC indicates the correct

value (instruction address + 4) for an instruction following a repeat detect ion instruction, but

PC indicates the RS and (RS +2) for instructions two and three instructions following the

repeat detection instruction. Here, RS indicates the value stored in the repeat start register

(RS). The correct operation cannot be guaranteed for the incorrect PC values.

Accordingly, PC relative addressing instructions placed two or more instructions following the

repeat detection instruction cannot be executed correctly and the correct results cannot be

obtained.

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