SH7721 datasheet(161/1524 Pages) RENESAS

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Section 3 DSP Operating Unit

Rev. 3.00 Jan. 18, 2008 Page 99 of 1458

REJ09B0033-0300

• PC relative addressing instructions

MOV.A @(disp, PC), Rn

MOV.W @(disp, PC), Rn

MOV.L @(disp, PC), Rn

(Including the case when the MOV #imm,Rn is extended to MOV.W @(disp, PC), Rn or

MOV.L @(disp, PC), Rn)

Table 3.8

PC Value during Repeat Control (When RC[11:0]

≥ 2)

Number of Instructions in Repeat Loop

≥4

RptDtct

RptDtct + 4

RptDtct +4

RptDtct1

RptDtct1 + 4

RptDtct1+ 4

RptDtct1 + 4

RptDtct2

―

RptDtct1+ 4

RptDtct1 + 4

RptDtct3

―

RptDtct1 + 4

RS + 2

Note:

In table 3.8, the following labels are used.

RptDtct:

An address of the repeat detection instruction

RptDtct1:

An address of the instruction one instruction following the repeat start

instruction (In a repeat loop consisting of one to three instructions, RptStart is

a repeat start instruction)

RptDtct2:

An address of the instruction two instruction following the repeat start

instruction

RptDtct3:

An address of the instruction three instruction following the repeat start

instruction

(g)

Repeat counter and repeat control

The CPU always executes a program with comparing the repeat end register (RE) and the program

counter (PC). If the PC matches the RE while the RC[11:0] bits of the SR register are other than 0,

the repeat control function is initiated.

• If RC ≥ 2, a control is passed to a repeat start instruction after a repeat end instruction has been

executed. The RC is decremented by 1 at the completion of the repeat end instruction.

In this case, restrictions (1) to (6) are also applied.

• If RC == 1, the RC is decremented to 0 at the completion of the repeat end instruction and a

control is passed to the subsequent instruction. In this case, restrictions (1) to (6) are also

applied.

• If RC == 0, the repeat control function is not initiated even if a repeat detection instruction is

executed. The repeat loop is executed once as normal instructions and a control is not be

passed to a repeat start instruction even if a repeat end instruction is executed.

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