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SH7721 Datasheet(PDF) 309 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 309 Page - Renesas Technology Corp |
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309 / 1524 page ![]() Section 8 Interrupt Controller (INTC) Rev. 3.00 Jan. 18, 2008 Page 247 of 1458 REJ09B0033-0300 8.3.1 Interrupt Priority Registers A to J (IPRA to IPRJ) IPRA to IPRJ are 16-bit readable/writable registers in which priority levels from 0 to 15 are set for on-chip peripheral module and IRQ interrupts. Bit Bit Name Initial Value R/W Description 15 14 13 12 IPR15 IPR14 IPR13 IPR12 0 0 0 0 R/W R/W R/W R/W 11 10 9 8 IPR11 IPR10 IPR9 IPR8 0 0 0 0 R/W R/W R/W R/W 7 6 5 4 IPR7 IPR6 IPR5 IPR4 0 0 0 0 R/W R/W R/W R/W 3 2 1 0 IPR3 IPR2 IPR1 IPR0 0 0 0 0 R/W R/W R/W R/W These bits set the priority level for each interrupt source in 4-bit units. For details, see table 8.2. |
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