38C3 datasheet(56/224 Pages) RENESAS

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38C3 Group User’s Manual

HARDWARE

1-41

CLOCK GENERATING CIRCUIT

The 38C3 group has two built-in oscillation circuits. An oscillation

circuit can be formed by connecting a resonator between XIN and

XOUT (XCIN and XCOUT). Use the circuit constants in accordance with

the resonator manufacturer's recommended values. No external re-

sistor is needed between XIN and XOUT since a feedback resistor

exists on-chip. However, an external feedback resistor is needed be-

tween XCIN and XCOUT.

Immediately after power on, only the XIN oscillation circuit starts os-

cillating, and XCIN and XCOUT pins function as I/O ports.

Frequency control

(1) Middle-speed mode

The internal system clock is the frequency of XIN divided by 8. After

reset, this mode is selected.

(2) High-speed mode

The internal system clock is the frequency of XIN divided by 2.

(3) Low-speed mode

The internal system clock is the frequency of XCIN divided by 2.

sNotes on clock generating circuit

If you switch the mode between middle/high-speed and low-speed,

stabilize both XIN and XCIN oscillations. The sufficient time is required

for the sub clock to stabilize, especially immediately after power on

and at returning from stop mode. When switching the mode between

middle/high-speed and low-speed, set the frequency on condition

that f(XIN) > 3f(XCIN).

Oscillation control

(1) Stop mode

If the STP instruction is executed, the internal system clock stops at

an “H” level, and XIN and XCIN oscillators stop. Timer 1 is set to “FF16”

and timer 2 is set to “0116.”

Either XIN divided by 16 or XCIN divided by 16 is input to timer 1 as

count source, and the output of timer 1 is connected to timer 2. The

bits of the timer 12 mode register are cleared to “0.” Set the interrupt

enable bits of the timer 1 and timer 2 to disabled (“0”) before execut-

ing the STP instruction. Oscillator restarts when an external interrupt

is received, but the internal system clock is not supplied to the CPU

until timer 2 underflows. This allows time for the clock circuit oscilla-

tion to stabilize.

(2) Wait mode

If the WIT instruction is executed, the internal system clock stops at

an “H” level. The states of XIN and XCIN are the same as the state

before executing the WIT instruction. The internal system clock re-

starts at reset or when an interrupt is received. Since the oscillator

does not stop, normal operation can be started immediately after the

clock is restarted.

Fig. 42 Ceramic resonator circuit

Fig. 43 External clock input circuit

FUNCTIONAL DESCRIPTION

XCIN

XCOUT

XIN

XOUT

CIN

COUT

CCIN

CCOUT

XIN

XOUT

External oscillation circuit

VCC

VSS

open

XCIN

XCOUT

CCIN

CCOUT

38C3 Datasheet(PDF) 56 Page - Renesas Technology Corp

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