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7477 Datasheet(PDF) 138 Page - Renesas Technology Corp |
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7477 Datasheet(HTML) 138 Page - Renesas Technology Corp |
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138 / 354 page ![]() 1-121 7470/7471/7477/7478 GROUP USER’S MANUAL HARDWARE 1.13 Serial I/O Fig. 1.13B.10 Transmit timing chart of UART A1 D0 D1 D2 ST D6 SP D7 TXD pin Synchronous clock, BRG output divided by 16, or external clock divided by 16 Write signal to Transmit buffer register : • Clearing by writing “0” to the transmit interrupt request bit. • Clearing by accepting the transmit interrupt. Transmit buffer empty flag Transmit shift completion flag Transmit interrupt enable bit Transmit interrupt request bit : When interrupt request generation is selected, when the Transmit buffer register becomes empty by clearing the transmit interrupt source selection bit to “0”. : When interrupt request generation is selected, when the shift operation of the Transmit shift register is completed by setting the transmit interrupt source selection bit to “1”. Serial I/O not used A2 B1 B2 B1 A1 B2 A2 |
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