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7477 Datasheet(PDF) 141 Page - Renesas Technology Corp

Part # 7477
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  354 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7477 Datasheet(HTML) 141 Page - Renesas Technology Corp

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7470/7471/7477/7478 GROUP USER’S MANUAL
1-124
HARDWARE
1.13 Serial I/O
q Receive interrupt operation (valid when the Serial I/O is selected)
When receive data is transferred from the Receive shift register to the Receive buffer register after
one-byte data is all input to the Receive shift register, an interrupt request is generated.
* In case of the UART, an interrupt operation is performed in the same way as when the synchronous
clock is selected.
Figure 1.13B.11 shows a receive operation of UART and Figure 1.13B.12 shows a receive timing
of UART.
Fig. 1.13B.11 Receive operation of UART
RxD (noise)
RxD (ST)
Œ
1
b1
0
RxD (SP)

1
b5
0
P14/RxD
D0
b0
D1
D2
D3
D0
b0
P14/RxD
D5
D2
D6
D7
D3
D4
D0
D1

1
b3
0
1
b6
0
0
0
b4
b5
1
1
Synchronous clock
“H” level detected
→ judge as noise
Synchronous clock
Receive shift register
Synchronous clock
Synchronous clock
Receive shift register
Receive shift register
Receive buffer register
(Address 00E016)
Receive data transfer
Synchronous clock
Serial I/O status register
(Address 00E116)
Interrupt request register 1
(Address 00FC16)
Serial I/O status register
(Address 00E116)
b3(OE)=“1” when the overrun error occurs.
b4(PE)=“1” when the parity error occurs.
b5(FE)=“1” when the framing error occurs.
b6(SE)=“1” when OE U PE U FE=1.
“L” level detected
→ judge as start bit

Ž
‘



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