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7477 Datasheet(PDF) 143 Page - Renesas Technology Corp

Part # 7477
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  354 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7477 Datasheet(HTML) 143 Page - Renesas Technology Corp

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7470/7471/7477/7478 GROUP USER’S MANUAL
1-126
HARDWARE
1.13 Serial I/O
[UART receive setting method]
1 Clear the Serial I/O receive interrupt enable bit (bit 5 of Interrupt control register 1) to “0.”
2 When selecting the internal clock, set the BRG value.
3 Set the Serial I/O control register according to Table 1.13B.7.
4 Set the data format according to Table 1.13B.6.
5 When using a Serial I/O receive interrupt
[1] Clear the Serial I/O receive interrupt request bit (bit 5 of Interrupt request register 1) to “0.”
Note: When the ordinary port is switched over to the Serial I/O port, the Serial I/O receive
interrupt request may be set to “1.” Clear the Serial I/O receive interrupt request bit
to “0” after one instruction or more after switching the ordinary port over to the Serial
I/O port.
[2] Set the Serial I/O receive interrupt enable bit to “1.”
6 In the full-duplex data communication, set transmit data in the Transmit buffer register (TB).
Table 1.13B.7 UART receive setting
Register to be used
Item
f (XIN)/4
f (XIN)/16
BRG output divided by 16
External clock input divided by 16
Transmit buffer empty
When the transmit shift operation is completed
Disable (Half-duplex data communication)
Enable (Full-duplex data communication)
Receive enable
Clock asynchronous
P14 to P17 function as serial I/O pins (Note 3)
Serial I/O control register
(SIOCON: Address 00E216)
bit
b0
b1
b2
b3
b4
b5
b6
b7
setting value
0
1
0
1
(Note 2)
0
1
0
1
1
0
1
Notes 1: f(XCIN)/4 (setting value : 0), f(XCIN)/16 (setting value : 1) can be selected in the 7478 Group.
2: When the UART is selected, this bit does not function.
3: When the internal clock is selected, the P16/SCLK pin can be used as port P1 6.
BRG count source selection
(Note 1)
Synchronous clock selection
__________
SRDY
signal output selection
Transmit interrupt request selection
Transmit enable selection
Receive enable selection
Clock asynchronous selection
Serial I/O enable selection



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