ADS5481 datasheet(35/42 Pages) TI

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Power Supplies and Sleep Modes

fIN − Input Frequency − MHz

−120

−100

−80

−60

−40

−20

0.1

G067

100

AVDD3V

DVDD3V

AVDD5V

ADS5481

ADS5482

ADS5483

www.ti.com................................................................................................................................................... SLAS565A – JUNE 2008 – REVISED NOVEMBER 2008

The ADS548x uses three power supplies. For the analog portion of the design, a 5-V and 3.3-V supply (AVDD5

and AVDD3) are used, while the digital portion uses a 3.3-V supply (DVDD3). The use of low-noise power

supplies with adequate decoupling is recommended. Linear supplies are preferred to switched supplies; switched

supplies generate more noise that can be coupled to the ADS548x. However, the PSRR value and plot shown in

Figure 76 were obtained without bulk supply decoupling capacitors. When bulk (0.1

µF) decoupling capacitors

are used near the supply pins, the board-level PSRR is much higher than the stated value for the ADC. The user

may be able to supply power to the device with a less-than-ideal supply and still achieve very good performance.

It is not possible to make a single recommendation for every type of supply and level of decoupling for all

systems. If the noise characteristics of the available supplies are understood, a study of the PSRR data for the

ADS548x may provide the user with enough information to select noisy supplies if the performance is still

acceptable within the frequency range of interest. The power consumption of the ADS548x does not change

substantially over clock rate or input frequency.

Figure 76. PSRR versus Supply Injected Frequency

Two separate sleep modes are offered. They are differentiated by the amount of power consumed and the time it

takes for the ADC to wakeup from sleep. The light sleep mode consumes 605mW and can be used when

wakeup of less than 600us is required. Deep sleep consumes 70mW and requires 6ms to wakeup. See the

wakeup characteristic at Figure 57. For directions on enabling these modes, see Table 4. The input clock can be

in either state when the power down modes are enabled. The device can enter power-down mode whether using

internal or external reference. However, the wakeup time from light sleep enabled to external reference mode is

dependent on the external reference voltage and is not necessarily 0.6 ms, but should be noticeably faster than

deep sleep wakeup. No specific power sequences are required.

Table 4. Power Down and Reference Modes

MODE

PDWNF PIN

PDWNS PIN

POWER CONSUMPTION

WAKEUP TIME

ADC ON - Internal reference

Low

2.2 W

ADC ON - External reference

High

2.2 W

Light sleep

High

Low

605 mW when enabled

0.6 ms

Deep sleep

Low

High

70 mW when enabled

6 ms

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