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ISP1505CBS Datasheet(PDF) 7 Page - NXP Semiconductors

Part # ISP1505CBS
Description  ULPI Hi-Speed USB host and peripheral transceiver
PDF  76 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

ISP1505CBS Datasheet(HTML) 7 Page - NXP Semiconductors

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ISP1505A_ISP1505C_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 26 August 2008
6 of 75
NXP Semiconductors
ISP1505A; ISP1505C
ULPI HS USB host and peripheral transceiver
[1]
Symbol names ending with underscore N, for example, NAME_N, indicate active LOW signals.
[2]
For details on external components required on each pin, see bill of materials and application diagrams in Section 16.
[3]
I = input; O = output; I/O = digital input/output; AI = analog input; AO = analog output; AI/O = analog input/output; P = power or ground
pin.
[4]
A detailed description of these pins can be found in Section 7.10.
RESET_N/PSW_N 12
I/O
This pin has two possible functions:
RESET_N (input) — Active LOW, asynchronous reset input.
3.3 V tolerant; plain input
PSW_N (output) — Active LOW external VBUS power switch or external charge
pump enable.
open-drain; 3.3 V tolerant
If not used, this pin must be connected to VCC(I/O).
REG1V8
13
P
1.8 V regulator output
DIR
14
O
ULPI direction signal
slew-rate controlled output (1 ns)
STP
15
I
ULPI stop signal
plain input; programmable pull up
NXT
16
O
ULPI next signal
slew-rate controlled output (1 ns)
DATA7
17
I/O
pin 7 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
DATA6
18
I/O
pin 6 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
DATA5
19
I/O
pin 5 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
DATA4
20
I/O
pin 4 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
CLOCK
21
O
60 MHz clock output
slew-rate controlled output (1 ns)
DATA3
22
I/O
pin 3 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
VCC(I/O)
23
P
I/O supply rail
DATA2
24
I/O
pin 2 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
GND
die
pad
P
ground supply; down bonded to the exposed die pad (heat sink); to be connected to
the PCB ground
Table 2.
Pin description …continued
Symbol[1][2]
Pin
Type[3]
Description[4]



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