33937 datasheet(30/48 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33937

FUNCTIONAL INTERNAL BLOCK DESCRIPTION

interrupt - the INT pin will be asserted High. The INT will be

held in the High state until the fault is removed, and the

appropriate bit in the Status Register 0 is cleared by the

CLINT0 command. This fault reporting technique is

described in detail in the Logic Commands and Registers

section.

Desaturation Detector

The Desaturation Detector is a comparator integrated into

the output driver of each phase channel. It provides an

additional means to protect against “Short-to-Ground” fault

condition when the output node gets shorted to the supply

voltage (short across the High Side FET).

Figure 18. Short to Ground Detection

When switching from Low Side to High Side, the High Side

will be commanded ON after the end of the deadtime. The

deadtime period starts when the Low Side is commanded

OFF. If the voltage at Px_HS_S is less than 1.4V below VSUP

after the blanking time (tBLANK) a desaturation fault is

initiated. An additional 1.0

μs digital filter is applied from the

initiation of the desaturation fault before it is registered, and

all phase drivers are turned OFF (Px_HS_G clamped to

Px_HS_S and Px_LS_G clamped to Px_LS_S). If the

desaturation fault condition clears before the filter time

expires, the fault is ignored and the filter timer resets.

Valid faults are registered in the fault status register, which

can be retrieved by way of the SPI. Additional SPI commands

will mask the INT flag and disable output stage shutdown,

due to desaturation and phase errors. See the Logic

Commands and Registers section for details on masking INT

behavior and disabling the protective function.

Figure 19. Short to Supply Detection

Phase Comparator

Faults could also be detected as Phase Errors. A phase

error is generated if the output signal (at Px_HS_S) does not

properly reflect the drive conditions.

A phase error is detected by a Phase Comparator. The

Phase Comparator compares the voltage at the Px_HS_S

node with a reference of one half the voltage at the VSUP pin.

A High Side phase error (which will also trigger the

Desaturation Detector) occurs when the High Side FET is

commanded on, and Px_HS_S is still low at the end of the

deadtime and blanking time duration. Similarly, a LS phase

error occurs when the Low Side FET is commanded on, and

the Px_HS_S is still high at the end of the deadtime and

blanking time duration.

The Phase Error Flag is the triple OR of phase errors from

each phase. Each phase error is the OR of the High Side and

Low Side phase errors. This flag can generate an interrupt if

VSUP

Phase x

Output

RSense

Phase

Return

T-Lim

VLS_CAP

Px_LS_S

Px_LS_G

Px_HS_G

Px_HS_S

Px_BOOT

Phase

Comp.

Desat.

Comp.

VSUP

1.4V

Low

-Side

Driver

High

-Side

Driver

Control

VLS

To Current

Sense Amplif.

Phase x Output

Shorted to Ground

(Low-Side

FET Shorted)

Control

Px_LS_G

Px_HS_G

Deadtime

-VD

VSUP

Phase x Output

Voltage Shorted to Ground

Correct Phase x Output Voltage

0.5VSUP

PHASEx

Correct

Fault

Phase Error

tBLANK

tFILT

Desaturation Error

VSUP

Phase x

Output

RSense

Phase

Return

T-Lim

VLS_CAP

Px_LS_S

Px_LS_G

Px_HS_G

Px_HS_S

Px_BOOT

Phase

Comp.

Desat.

Comp.

VSUP

1.4V

Low

-Side

Driver

High

-Side

Driver

Control

VLS

To Current

Sense Amplif.

Phase x Output

Shorted to VSUP

(High-Side

FET Shorted)

Control

Px_LS_G

Px_HS_G

Deadtime

-VD

VSUP

Phase x Output Voltage Shorted to VSUP

Correct Phase x Output Voltage

0.5VSUP

PHASEx

Correct

Fault

Phase Error

tBLANK

33937 Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc

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