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ST8012 Datasheet(PDF) 41 Page - Sitronix Technology Co., Ltd. |
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ST8012 Datasheet(HTML) 41 Page - Sitronix Technology Co., Ltd. |
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41 / 47 page ![]() ST8012 V1.6 41/47 2004/09/08 Application1 Circuit for Module of VLCD No Duty Vlcd (v) 1 1/32 6,7 2 1/48 7,8 3 1/64 9,10 4 1/80 10,11 5 1/96 10,11 6 1/112 11,12 7 1/120 11,12 Note : The value of panel’s ITO resistor is 10Ω. Application Timing Block: Example 160X80 Frame and Lp falling edge (or rising edge) must >10ns Between Lp falling edge and XCK rising edge must >50ns |
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