LPC2364 datasheet(47/59 Pages) NXP

47 / 59 page

LPC2364_65_66_67_68_6

Product data sheet

Rev. 06 — 1 February 2010

47 of 59

NXP Semiconductors

LPC2364/65/66/67/68

Single-chip 16-bit/32-bit microcontrollers

11. ADC electrical characteristics

[1]

Conditions: VSSA = 0 V, VDDA = 3.3 V.

[2]

The ADC is monotonic, there are no missing codes.

[3]

The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 14.

[4]

The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after

appropriate adjustment of gain and offset errors. See Figure 14.

[5]

The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the

ideal curve. See Figure 14.

[6]

The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset

error, and the straight line which fits the ideal transfer curve. See Figure 14.

[7]

The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated

ADC and the ideal transfer curve. See Figure 14.

[8]

See Figure 15.

Table 10.

ADC characteristics

VDDA = 2.5 V to 3.6 V; Tamb = −40 °C to +85 °C, unless otherwise specified; ADC frequency 4.5 MHz.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIA

analog input voltage

VDDA

Cia

analog input capacitance

differential linearity error

[1][2][3] -

±1

LSB

EL(adj)

integral non-linearity

[1][4] -

±2

LSB

offset error

[1][5] -

±3

LSB

gain error

[1][6] -

±0.5

absolute error

[1][7] -

±4

LSB

Rvsi

voltage source interface

resistance

[8] -

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