DM9161 datasheet(42/50 Pages) DAVICOM

42 / 50 page

DM9161

10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver

Final

Version: DM9161-DS-F05

September 10, 2008

10. Application Notes

10.1 Network Interface Signal Routing

Place the transformer as close as possible to the RJ-45

connector. Place all the 50Ω resistors as close as possible

to the DM9161 RX± and TX± pins. Traces routed from RX±

and TX± to the transformer should run in close pairs directly

to the transformer. The designer should be careful not to

cross the transmit and receive pairs. As always, vias should

be avoided as much as possible. The network interface

should be void of any signals other than the TX± and RX±

pairs between the RJ-45 to the transformer and the

transformer to the DM9161. There should be no power or

ground planes in the area under the network side of the

transformer to include the area under the RJ-45 connector

(Refer to Figure 10-1 and 10-2). Keep chassis ground away

from all active signals. The RJ-45 connector and any unused

pins should be tied to chassis ground through a resistor

divider network and a 2KV bypass capacitor.

The Band Gap resistor should be placed as physically close

to pin 47 and 48 as possible (refer to Figure 10-1 and 10-2 ).

The designer should not run any high-speed signal near the

Band Gap resistor placement.

10.2 10Base-T/100Base-TX Application

Figure 10-1

DM9161

RX+

RX-

TX+

TX-

BGRES

BGRESG

Transformer

RJ45

1:1

75Ω

3.3V AVCC

0.1µ F

0.1µ F/2KV or 0.01µ F/2KV

Chasis GND

6.8KΩ, 1%

50Ω

AVDD

AGND

DM9161 Datasheet(PDF) 42 Page - Davicom Semiconductor, Inc.

DM9161 Datasheet(HTML) 42 Page - Davicom Semiconductor, Inc.

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