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SE97BTP Datasheet(PDF) 17 Page - NXP Semiconductors |
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SE97BTP Datasheet(HTML) 17 Page - NXP Semiconductors |
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17 / 53 page ![]() SE97B_1 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 27 January 2010 17 of 53 NXP Semiconductors SE97B DDR memory module temp sensor with integrated SPD 7.10.1.3 Acknowledge polling Acknowledge polling can be used to determine if the SE97B is busy writing or is ready to accept commands. Polling is implemented by sending a ‘Selective Read’ command (described in Section 7.10.3 “Read operations”) to the device. The SE97B will not acknowledge the slave address as long as internal write is in progress. 7.10.2 Memory Protection The lower half (the first 128 bytes) of the memory can be write protected by special EEPROM commands without an external control pin. The SE97B features three types of memory write protection instructions, and three respective read Protection instructions. The level of write-protection (set or clear) that has been defined using these instructions remained defined even after power cycle. The memory protection commands are: • Permanent Write Protection (PWP) • Reversible Write Protection (RWP) • Clear Write Protection (CWP) • Read Permanent Write Protection (RPWP) • Read Reversible Write Protection (RRWP) • Read Clear Write Protection (RCWP) Table 6 is the summary for normal and memory protection instructions. [1] The most significant bit, bit 7, is sent first. [2] VI(ov) ranges from 7.0 V to 10 V. [3] A0, A1, and A2 are compared against the respective external pins on the SE97B. Do not apply VI(ov) to the A0 pin during Normal EEPROM read/write, Permanent Write Protection (PWP) and Read PWP. This special EEPROM command consists of a unique 4-bit fixed address (0110b) and the voltage level applied on the 3-bit hardware address. Normally, to address the memory array, the 4-bit fixed address is ‘1010b’. To access the memory protection settings, the 4-bit fixed address is ‘0110b’. Figure 13 and Figure 14 show the write and read protection sequence, respectively. Table 6. EEPROM commands summary Command Fixed address Hardware selectable address R/W Bit 7[1] Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Normal EEPROM read/write 1010A2 A1 A0 R/W Reversible Write Protection (RWP) 0110VSS VSS VI(ov)[2] 0 Clear Reversible Write Protection (CRWP) 0110VSS VDD VI(ov)[2] 0 Permanent Write Protection (PWP)[3] 0110A2 A1 A0 0 Read RWP 0110VSS VSS VI(ov)[2] 1 Read CRWP 0110VSS VDD VI(ov)[2] 1 Read PWP 0110A2 A1 A0 1 |
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